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Cadence Expands TSMC Partnership for AI and HPC Chip Design

Key Takeaways
  • Cadence expands partnership with TSMC for AI and HPC chip design.
  • Partnership includes TSMC A14 certification and silicon-proven IP on TSMC N3P/N2P.
  • Cadence solutions support wafer-scale 3D-IC for hundreds of chiplets.
  • Expanded 3DFabric and TSMC-COUPE support for scaling chiplets.
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Strategic Implications

This expanded partnership may indicate a growing trend towards collaborative innovation in AI and HPC chip design, suggesting a potential shift in the semiconductor industry towards more integrated and specialized solutions. The partnership could also accelerate the development of advanced semiconductor technologies, which may have significant implications for the aerospace and defense industries.

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What Happened

Enhanced Collaboration for Advanced Semiconductor Designs

Cadence has announced an expanded partnership with TSMC to deliver advanced capabilities for AI and HPC designers. The partnership includes TSMC A14 certification, silicon-proven IP on TSMC N3P/N2P, and wafer-scale 3D-IC for hundreds of chiplets. Cadence solutions also support expanded 3DFabric and TSMC-COUPE for scaling chiplets. This collaboration is expected to accelerate innovation in the engineering design of silicon to systems, as reported by Cadence.

Source | Originally Published: September 24, 2026

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JUMPSEAT
AEROSPACE NEWS
JUMPSEAT
AEROSPACE NEWS

Cadence Expands TSMC Partnership for AI and HPC Chip Design

Sponsored by: Jumpseat Solutions
Key Takeaways
  • Cadence expands partnership with TSMC for AI and HPC chip design.
  • Partnership includes TSMC A14 certification and silicon-proven IP on TSMC N3P/N2P.
  • Cadence solutions support wafer-scale 3D-IC for hundreds of chiplets.
  • Expanded 3DFabric and TSMC-COUPE support for scaling chiplets.
Sign in to view key takeaways Get full access to in-depth analysis and key takeaways.
Sign In
Silver membership required Upgrade to Silver to access Key Takeaways.
Upgrade
Strategic Implications

This expanded partnership may indicate a growing trend towards collaborative innovation in AI and HPC chip design, suggesting a potential shift in the semiconductor industry towards more integrated and specialized solutions. The partnership could also accelerate the development of advanced semiconductor technologies, which may have significant implications for the aerospace and defense industries.

Sign in to view strategic implications Get full access to strategic analysis and expert insights.
Sign In
Silver membership required Upgrade to Silver to access Strategic Implications.
Upgrade

What Happened

Enhanced Collaboration for Advanced Semiconductor Designs

Cadence has announced an expanded partnership with TSMC to deliver advanced capabilities for AI and HPC designers. The partnership includes TSMC A14 certification, silicon-proven IP on TSMC N3P/N2P, and wafer-scale 3D-IC for hundreds of chiplets. Cadence solutions also support expanded 3DFabric and TSMC-COUPE for scaling chiplets. This collaboration is expected to accelerate innovation in the engineering design of silicon to systems, as reported by Cadence.

Source | Originally Published: September 24, 2026

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